Cadence University Program

University of Campinas-UNICAMP

Contact information: Prof. Dr. Fabiano Fruett

 

October 2018

 

The University of Campinas was established in 1966, as a public university funded by the State of São Paulo. Our mission is to provide education and training, qualifying our students to play a key role in the process of social development. In emphasizing scientific investigation, Unicamp believes that research, whose priority is bettering the quality of education, can also serve as an economic activity.  From this point of view its relationships with industry and funding agencies are natural consequences, as is the rapid adoption of results in the product process. Acting as an authentic “research engine” and as a center for the formation of highly qualified professionals, Unicamp generates its own technological businesses through the initiative of ex-students or professors and has attracted high tech businesses to its immediate environs.  The existence of this technology park, together with the continued effort of Unicamp, has produced large and beneficial alterations to the economic profile of the region.

School of Electrical and Computer Engineering-FEEC

The Electrical Engineering course first class was in 1967, and the Master and Doctor level had beginning in 1972. Its main mission is to develop good engineers and research to attend the community.

RF Microelectronics and Antennas Group

The RF Microelectronics and Antennas Group is traditional on CMOS integrated circuits and RF design, with several graduates and undergraduates students. Analog, Digital and Mixed-signal designs are in continuous development at FEEC-Unicamp. Now, the group is developing a complete Front-Ended reception for the Brazilian 4G technology.

Laboratory of Microelectronic Sensors (LSM)

The Laboratory of Microelectronic Sensors focus on development, project, post-processing and characterization of integrated circuits and sensors for different signal domains. These systems combine Microelectromechanical structures, signal processing and conversion in the same chip or packaging.

Figure 1. (a) Esquemático; (b) layout, do LNA, 2.6 GHz, Front-End Amplifier: Exploring Cascode topology with partial inductive source degeneration

Figura 2. Microfotografia do circuito integrado do condicionador de sinais do sistema sensor de espectroscopia de impedância

Figura 3. receptor Optico/eletrônico

Institute of Computing (IC)

The Institute of Computing - IC, of UNICAMP was the first academic institution in Brazil to offer a bachelor's degree in Computer Science. IC-UNICAMP is consistently ranked as one of Brazil’s top institutions in providing high-level research, Master and PhD degrees that carry prestige and professional recognition. Evidence of these facts are over 50 thesis awards, many of which ranked first in the yearly competition promoted by the Brazilian Computer Society (SBC).

Cadence tools have enabled computer architecture research at the Institute of Computing, particularly in automated processor synthesis and various aspects of energy-efficiency.  The Encounter RTL compiler, NCSim, and Incisive Simulator tools have been especially useful for students working on IP design, synthesis, power, and timing analysis. Examples of recent work supported by Cadence tools include new methods for automated generation of reconfigurable processor cores for FPGAs from high-level architecture models; instruction-level characterization of energy usage in processors based on the open-source RISC-V architecture; new tools for the exploration of approximate computing cores and accelerators; and energy-efficiency analysis of PUF-based authentication.

Recent results include:
Energy-efficiency of PUF-based authentication architectures. MS Thesis, Matheus Susin (ongoing)
Architecture-Level Simulation of Approximate Hardware. MS Thesis, Isaías Felzmann (ongoing)
Automated Generation of Processors from Architectural Description Languages. Ph.D. Dissertation, Priscila Moraes Ioris (ongoing)
Instruction-level energy characterization of RISC-V Processors. Ph.D. Dissertation, Carlos Patry (ongoing)
Power Models for RISC-V Processor, 4th RISC-V Workshop Proceedings, 2016. Poster Presentation, Rodolfo Azevedo and Carlos Petry

Improving the Statistical Variability of Delay-based Physical Unclonable Functions

Physical Unclonable Functions (PUFs) are circuits that exploit the statistical variability of the fabrication process to create a unique device identity. PUFs have been used in the design of cryptographic primitives for applications like device authentication, key generation and intellectual property protection. This work uses extensive AMS 350nm Cadence SPICE-based Monte-Carlo simulation to analyze how the proper selection of arbiter element and gate sizing can affect the delay variability of APUFs.

[1] Cortes, M., Araujo, G., & Capovilla, J. (2015, August). Improving the statistical variability of delay-based physical unclonable functions. In 2015 28th IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) (pp. 1-7).

Cylindrical Reconvergence Physical Unclonable Function

This work designed a novel delay-based strong PUF, the CRPUF (Cylindrical Reconvergence PUF). Experiments using Cadence Monte-Carlo simulation show that CRPUF is much more resistant to modeling attacks than other delay and some memory-based PUFs, making it a good candidate to systems which have stringent cost and security constraints.

[1] Surita, R. C., Côrtes, M. L., Aranha, D. F., & Araujo, G. (2016, October). Cylindrical Reconvergence Physical Unclonable Function. In the IEEE Digital System Design (DSD), 2016 Euromicro Conference on (pp. 446-453).

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